Senior Microarchitect

Acceler8 Talent has partnered with a well-supported data center acceleration company that is actively searching for a Senior Microarchitect.

This company is deeply committed to developing a novel interconnect architecture aimed at resolving congestion challenges within extensively distributed systems. Their recent successful completion of a significant round of funding backed by Nvidia serves as a strong indicator of their growth and potential.

The company's founding members bring substantial expertise from distinguished hardware and technology enterprises. Notably, their primary investor boasts an admirable track record of nurturing early-stage startups into prosperous and thriving enterprises.

They are currently seeking an engineer with a high level of expertise with silicon development programs.

If you are located in the San Francisco Bay Area, Austin, TX, Raleigh, NC, or Boston, MA, area this company is offering a fully remote position.

Responsibilities:

• Ownership of all aspects of block design, from analysis of the design approach and tradeoffs, to specification, through RTL implementation.
• Delivery of a robust, high performance design that meets the timing, area, reliability, testability, and power requirements set by an aggressive cross-functional engineering team.
• Work with system software, architecture, and microarchitecture experts on the functional and performance requirements in the development of novel, high throughput engines for processing, moving, storing, and scheduling of data.
• Support functional verification, from involvement in setting the verification strategy, to the development of the test plan, through the execution of the testing and coverage phases.
• Support performance validation, to ensure that the product meets the strenuous performance demands of modern data centers across diverse use cases.
• Support silicon bringup and post-silicon testing of mission critical functions

Skills/Qualifications:

• Minimum BSEE/CE + 7 years or MSEE/CE + 5 years experience.
• Strong experience working with Datapath
• Experience with logic design, from design specification to RTL design to physical implementation. Must be very familiar with synthesis, P+R constraints, static timing analysis.
• Expert knowledge of SystemVerilog. Deep experience with simulators and waveform debugging tools.
• Good knowledge of Perl, Python, or other scripting languages.
• Desired past experience designing one or more of the following, in advanced silicon geometries High-performance NIC/DPU processing pipelines, datapaths, and interfaces, including blocks such as DMA controllers, flow parsers, classifiers, lookup engines, and queueing/doorbell engines.
• High-performance interface logic and/or processing pipelines for networking or bus protocols such as Ethernet, TCP/IP, Infiniband, Gen-Z, PCIe, CXL, NV-Link, etc.
• Track record of timely and high-quality design execution on products which have successfully deployed in production.