Design Verification Engineer
BBBH18629_1729265525
Posted: 18/10/2024
- US$200 - US$250000 per annum + stock options
- San Francisco, California
- Permanent
Looking to join an ambitious and highly experienced team of silicon and distributed system experts? Want to build a groundbreaking product that will challenge the industry status quo?
As a Design Verification Engineer, you'll work remotely, collaborating with world-class distributed systems hardware and software architects to contribute across the full lifecycle of complex chip development. You will incorporate state-of-the-art verification techniques and strategies to scale high-performing functionally complex devices.
About the company: Founded by leaders who have engineered industry-leading silicon, systems, infrastructure, and plant-scale distributed software, this company is looking to grow its team with experienced engineers excited by the prospect of revolutionizing next-gen, distributed, accelerating computing. Like the idea of working in a fast-paced, dynamic start-up environment? This opportunity might be for you!
This role might be ideal for you if you have:
- Proven industry experience and a successful track record in verifying chip- and block-level RTL designs for high-performance networking or computing chips (Network Interface Controllers, Smart-NICs, DPUs, etc.)
- Deep experience with full chip verification and infrastructure development
- Current knowledge of UVM constructs, components, and practices
- Expert knowledge of SystemVerilog and other scripting languages
- Experience working on data center class chips
- Arm protocols (AXI, AMBA, CHI)
- Proven track record of design execution and quality on high-volume shipped products
Familiarity with C/C++, general software engineering principles, and FPGA design flow/verification are strong pluses.
Base salary: $200,000 -$250,000
Mia Macdonald
Researcher