Design Verification Engineer
BBBH16958_1729265271
Posted: 18/10/2024
- US$200000.00 - US$300000.00 per annum + stock options
- Mountain View, California
- Permanent
Acceler8 Talent is looking for a Design Verification Engineer to join a high-performing San Fransisco based team, helping them create best-in-class silicon for high-performance and sustainable Generative AI. If you're looking to make an impact in this exciting age of technological advancement, this opportunity may be for you!
About the Company: Founded by engineers who have been instrumental in the industry's most successful semiconductor products, this company is pushing the boundaries for what LLMs can accomplish. With a team comprised of industry veterans, talent and passion are the foundational pillars behind their success.
About the Role: As the Design Verification Engineer, you'll be contributing to the verification methodology and execution across blocks, subsystems, full chip, and system-level validation. You'll own portions of the verification execution at the subsystem and chip level, creating testbenches and executing progress and verification closures toward various silicon milestones. This is a hybrid role based in the San Francisco Bay Area.
This role might be ideal for you if you have:
- Experience driving verification from concept-to-silicon
- Knowledge of scripting languages, including SystemVerilog, Python, and C/C++
- Knowledge of LPDDR/HBM or Ethernet/Mac/PCS/NOC
- Production experience with advanced verification methodologies (UVM, AVB, formal verification, etc.)
- Strong understanding of silicon micro-architecture and design concepts used in high-performance compute, high-speed connectivity, memory management, and related functionalities
Familiarity with emulation and prototyping platforms and methodologies and hands-on experience with participation in silicon debugging and bring-up are pluses!
Base Salary: $200,000 - $300,000 + equity + benefits
Mia Macdonald
Researcher